Condensed Matter Seminars

Resistive Random Access Memory (MRAM) is a new nonvolatile solid state memory that has the potential to be fast, low power, high density, and have unlimited read/write cycles. These combined characteristics make MRAM superior to other memory technologies. For a fully functioning MRAM, the understanding and control of a rich variety of physical phenomena is required. The bit cell is a magnetic tunnel junction, which consists of two thin magnetic layers separated by an ultrathin layer (1 nm) of oxidized Al. The tunneling process itself is an example of a macroscopic quantum effect. The magnetoresistance changes as much as 50% for parallel to antiparallel layer magnetizations. The magnetoresistance is a result of s-d exchange which polarizes conduction electrons to be parallel with the layer magnetizations. The uniformity of the tunnel barrier is critical for well-defined resistance values and to minimize tunneling hotspots. We show a resistance uniformity of less than 1% within a die, which implies an average thickness uniformity of a fraction of an angstrom. The bit shape is typically elliptical, with a magnetic free layer of thickness 4-6 nm. The bit shape defines a shape anisotropy along with a switching field. Variations in lithography and material properties cause a distribution in switching fields - a distribution that must be minimized for error free programming. The state of the bit (0 or 1) is programmed using current pulses that are nanoseconds in duration. The pulses are sent down conductive lines that are surrounded by a thin permeable magnetic film to enhance the generated field. A major challenge to error free programming is to minimize bit switching that is thermally activated. We have characterized thermal activation in our bits and showed that it obeys classic Arrhenius-Neel activation theory for single energy barriers. One way that we have developed to minimize the effects of thermal activation is to use multilayer films to increase the energy barrier to magnetization reversal. In the first part of this talk I will discuss the development of the MRAM read and write process at Motorola, covering the topics described above. I will then review the performance of Motorola's 1 Mb MRAM test vehicle. Finally, I will conclude by listing the major unsolved challenges that MRAM needs solved to become a dominant memory technology.